The field of the invention involves the pre-charging of memory devices. Static Random Access Memory (SRAM) is a type of semiconductor memory device used in a wide array of electronic devices, most prominently in critical, smaller applications, such as CPU and hard drive caches. Data is stored in SRAM memory statically. As such, dynamic updating is not required as in other memory devices, most notably Dynamic Random Access Memory (DRAM) devices. However, SRAM is volatile memory wherein data is only retained as long as power is supplied to the memory circuit. In addition, SRAM is a form of random access memory, meaning that memory locations may be written to or read from the device in any order independent of previous memory accesses.
In general, an SRAM memory cell consists of a set of transistors configured as cross-coupled inverters or flip-flops. For example, bits may be stored on four transistors that form two cross-coupled inverters. Additional access transistors may be present to control cell access during read and write operations. SRAM memory circuits utilize wordlines for controlling access to bit lines used for transferring data during read and write operations. The two bit lines are often referred to as BL and BL, or the true bit line and the complement bit line. The SRAM configuration has two stable states, equating to logical “0” and “1” states. The stability of the SRAM memory circuit may be enhanced by pre-charging the bit lines. Conventionally, the bit lines are precharged to the supply voltage with limited effect on memory stability, efficiency and performance.